lowrisc/registers/
keymgr_regs.rs

1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright lowRISC contributors 2023.
4
5// Generated register constants for keymgr.
6// Built for Earlgrey-M2.5.1-RC1-493-gedf5e35f5d
7// https://github.com/lowRISC/opentitan/tree/edf5e35f5d50a5377641c90a315109a351de7635
8// Tree status: clean
9// Build date: 2023-10-18T10:11:37
10
11// Original reference file: hw/ip/keymgr/data/keymgr.hjson
12use kernel::utilities::registers::ReadWrite;
13use kernel::utilities::registers::{register_bitfields, register_structs};
14/// Number of Registers for SW inputs (Salt)
15pub const KEYMGR_PARAM_NUM_SALT_REG: u32 = 8;
16/// Number of Registers for SW inputs (SW binding)
17pub const KEYMGR_PARAM_NUM_SW_BINDING_REG: u32 = 8;
18/// Number of Registers for SW outputs
19pub const KEYMGR_PARAM_NUM_OUT_REG: u32 = 8;
20/// Number of Registers for key version
21pub const KEYMGR_PARAM_NUM_KEY_VERSION: u32 = 1;
22/// Number of alerts
23pub const KEYMGR_PARAM_NUM_ALERTS: u32 = 2;
24/// Register width
25pub const KEYMGR_PARAM_REG_WIDTH: u32 = 32;
26
27register_structs! {
28    pub KeymgrRegisters {
29        /// Interrupt State Register
30        (0x0000 => pub(crate) intr_state: ReadWrite<u32, INTR::Register>),
31        /// Interrupt Enable Register
32        (0x0004 => pub(crate) intr_enable: ReadWrite<u32, INTR::Register>),
33        /// Interrupt Test Register
34        (0x0008 => pub(crate) intr_test: ReadWrite<u32, INTR::Register>),
35        /// Alert Test Register
36        (0x000c => pub(crate) alert_test: ReadWrite<u32, ALERT_TEST::Register>),
37        /// Key manager configuration enable
38        (0x0010 => pub(crate) cfg_regwen: ReadWrite<u32, CFG_REGWEN::Register>),
39        /// Key manager operation start
40        (0x0014 => pub(crate) start: ReadWrite<u32, START::Register>),
41        /// Key manager operation controls
42        (0x0018 => pub(crate) control_shadowed: ReadWrite<u32, CONTROL_SHADOWED::Register>),
43        /// sideload key slots clear
44        (0x001c => pub(crate) sideload_clear: ReadWrite<u32, SIDELOAD_CLEAR::Register>),
45        /// regwen for reseed interval
46        (0x0020 => pub(crate) reseed_interval_regwen: ReadWrite<u32, RESEED_INTERVAL_REGWEN::Register>),
47        /// Reseed interval for key manager entropy reseed
48        (0x0024 => pub(crate) reseed_interval_shadowed: ReadWrite<u32, RESEED_INTERVAL_SHADOWED::Register>),
49        /// Register write enable for SOFTWARE_BINDING
50        (0x0028 => pub(crate) sw_binding_regwen: ReadWrite<u32, SW_BINDING_REGWEN::Register>),
51        /// Software binding input to sealing portion of the key manager.
52        (0x002c => pub(crate) sealing_sw_binding: [ReadWrite<u32, SEALING_SW_BINDING::Register>; 8]),
53        /// Software binding input to the attestation portion of the key manager.
54        (0x004c => pub(crate) attest_sw_binding: [ReadWrite<u32, ATTEST_SW_BINDING::Register>; 8]),
55        /// Salt value used as part of output generation
56        (0x006c => pub(crate) salt: [ReadWrite<u32, SALT::Register>; 8]),
57        /// Version used as part of output generation
58        (0x008c => pub(crate) key_version: [ReadWrite<u32, KEY_VERSION::Register>; 1]),
59        /// Register write enable for MAX_CREATOR_KEY_VERSION
60        (0x0090 => pub(crate) max_creator_key_ver_regwen: ReadWrite<u32, MAX_CREATOR_KEY_VER_REGWEN::Register>),
61        /// Max creator key version
62        (0x0094 => pub(crate) max_creator_key_ver_shadowed: ReadWrite<u32, MAX_CREATOR_KEY_VER_SHADOWED::Register>),
63        /// Register write enable for MAX_OWNER_INT_KEY_VERSION
64        (0x0098 => pub(crate) max_owner_int_key_ver_regwen: ReadWrite<u32, MAX_OWNER_INT_KEY_VER_REGWEN::Register>),
65        /// Max owner intermediate key version
66        (0x009c => pub(crate) max_owner_int_key_ver_shadowed: ReadWrite<u32, MAX_OWNER_INT_KEY_VER_SHADOWED::Register>),
67        /// Register write enable for MAX_OWNER_KEY_VERSION
68        (0x00a0 => pub(crate) max_owner_key_ver_regwen: ReadWrite<u32, MAX_OWNER_KEY_VER_REGWEN::Register>),
69        /// Max owner key version
70        (0x00a4 => pub(crate) max_owner_key_ver_shadowed: ReadWrite<u32, MAX_OWNER_KEY_VER_SHADOWED::Register>),
71        /// Key manager software output.
72        (0x00a8 => pub(crate) sw_share0_output: [ReadWrite<u32, SW_SHARE0_OUTPUT::Register>; 8]),
73        /// Key manager software output.
74        (0x00c8 => pub(crate) sw_share1_output: [ReadWrite<u32, SW_SHARE1_OUTPUT::Register>; 8]),
75        /// Key manager working state.
76        (0x00e8 => pub(crate) working_state: ReadWrite<u32, WORKING_STATE::Register>),
77        /// Key manager status.
78        (0x00ec => pub(crate) op_status: ReadWrite<u32, OP_STATUS::Register>),
79        /// Key manager error code.
80        (0x00f0 => pub(crate) err_code: ReadWrite<u32, ERR_CODE::Register>),
81        /// This register represents both synchronous and asynchronous fatal faults.
82        (0x00f4 => pub(crate) fault_status: ReadWrite<u32, FAULT_STATUS::Register>),
83        /// The register holds some debug information that may be convenient if keymgr
84        (0x00f8 => pub(crate) debug: ReadWrite<u32, DEBUG::Register>),
85        (0x00fc => @END),
86    }
87}
88
89register_bitfields![u32,
90    /// Common Interrupt Offsets
91    pub(crate) INTR [
92        OP_DONE OFFSET(0) NUMBITS(1) [],
93    ],
94    pub(crate) ALERT_TEST [
95        RECOV_OPERATION_ERR OFFSET(0) NUMBITS(1) [],
96        FATAL_FAULT_ERR OFFSET(1) NUMBITS(1) [],
97    ],
98    pub(crate) CFG_REGWEN [
99        EN OFFSET(0) NUMBITS(1) [],
100    ],
101    pub(crate) START [
102        EN OFFSET(0) NUMBITS(1) [
103            VALID_STATE = 1,
104        ],
105    ],
106    pub(crate) CONTROL_SHADOWED [
107        OPERATION OFFSET(4) NUMBITS(3) [
108            ADVANCE = 0,
109            GENERATE_ID = 1,
110            GENERATE_SW_OUTPUT = 2,
111            GENERATE_HW_OUTPUT = 3,
112            DISABLE = 4,
113        ],
114        CDI_SEL OFFSET(7) NUMBITS(1) [
115            SEALING_CDI = 0,
116            ATTESTATION_CDI = 1,
117        ],
118        DEST_SEL OFFSET(12) NUMBITS(2) [
119            NONE = 0,
120            AES = 1,
121            KMAC = 2,
122            OTBN = 3,
123        ],
124    ],
125    pub(crate) SIDELOAD_CLEAR [
126        VAL OFFSET(0) NUMBITS(3) [
127            NONE = 0,
128            AES = 1,
129            KMAC = 2,
130            OTBN = 3,
131        ],
132    ],
133    pub(crate) RESEED_INTERVAL_REGWEN [
134        EN OFFSET(0) NUMBITS(1) [],
135    ],
136    pub(crate) RESEED_INTERVAL_SHADOWED [
137        VAL OFFSET(0) NUMBITS(16) [],
138    ],
139    pub(crate) SW_BINDING_REGWEN [
140        EN OFFSET(0) NUMBITS(1) [],
141    ],
142    pub(crate) SEALING_SW_BINDING [
143        VAL_0 OFFSET(0) NUMBITS(32) [],
144    ],
145    pub(crate) ATTEST_SW_BINDING [
146        VAL_0 OFFSET(0) NUMBITS(32) [],
147    ],
148    pub(crate) SALT [
149        VAL_0 OFFSET(0) NUMBITS(32) [],
150    ],
151    pub(crate) KEY_VERSION [
152        VAL_0 OFFSET(0) NUMBITS(32) [],
153    ],
154    pub(crate) MAX_CREATOR_KEY_VER_REGWEN [
155        EN OFFSET(0) NUMBITS(1) [],
156    ],
157    pub(crate) MAX_CREATOR_KEY_VER_SHADOWED [
158        VAL OFFSET(0) NUMBITS(32) [],
159    ],
160    pub(crate) MAX_OWNER_INT_KEY_VER_REGWEN [
161        EN OFFSET(0) NUMBITS(1) [],
162    ],
163    pub(crate) MAX_OWNER_INT_KEY_VER_SHADOWED [
164        VAL OFFSET(0) NUMBITS(32) [],
165    ],
166    pub(crate) MAX_OWNER_KEY_VER_REGWEN [
167        EN OFFSET(0) NUMBITS(1) [],
168    ],
169    pub(crate) MAX_OWNER_KEY_VER_SHADOWED [
170        VAL OFFSET(0) NUMBITS(32) [],
171    ],
172    pub(crate) SW_SHARE0_OUTPUT [
173        VAL_0 OFFSET(0) NUMBITS(32) [],
174    ],
175    pub(crate) SW_SHARE1_OUTPUT [
176        VAL_0 OFFSET(0) NUMBITS(32) [],
177    ],
178    pub(crate) WORKING_STATE [
179        STATE OFFSET(0) NUMBITS(3) [
180            RESET = 0,
181            INIT = 1,
182            CREATOR_ROOT_KEY = 2,
183            OWNER_INTERMEDIATE_KEY = 3,
184            OWNER_KEY = 4,
185            DISABLED = 5,
186            INVALID = 6,
187        ],
188    ],
189    pub(crate) OP_STATUS [
190        STATUS OFFSET(0) NUMBITS(2) [
191            IDLE = 0,
192            WIP = 1,
193            DONE_SUCCESS = 2,
194            DONE_ERROR = 3,
195        ],
196    ],
197    pub(crate) ERR_CODE [
198        INVALID_OP OFFSET(0) NUMBITS(1) [],
199        INVALID_KMAC_INPUT OFFSET(1) NUMBITS(1) [],
200        INVALID_SHADOW_UPDATE OFFSET(2) NUMBITS(1) [],
201    ],
202    pub(crate) FAULT_STATUS [
203        CMD OFFSET(0) NUMBITS(1) [],
204        KMAC_FSM OFFSET(1) NUMBITS(1) [],
205        KMAC_DONE OFFSET(2) NUMBITS(1) [],
206        KMAC_OP OFFSET(3) NUMBITS(1) [],
207        KMAC_OUT OFFSET(4) NUMBITS(1) [],
208        REGFILE_INTG OFFSET(5) NUMBITS(1) [],
209        SHADOW OFFSET(6) NUMBITS(1) [],
210        CTRL_FSM_INTG OFFSET(7) NUMBITS(1) [],
211        CTRL_FSM_CHK OFFSET(8) NUMBITS(1) [],
212        CTRL_FSM_CNT OFFSET(9) NUMBITS(1) [],
213        RESEED_CNT OFFSET(10) NUMBITS(1) [],
214        SIDE_CTRL_FSM OFFSET(11) NUMBITS(1) [],
215        SIDE_CTRL_SEL OFFSET(12) NUMBITS(1) [],
216        KEY_ECC OFFSET(13) NUMBITS(1) [],
217    ],
218    pub(crate) DEBUG [
219        INVALID_CREATOR_SEED OFFSET(0) NUMBITS(1) [],
220        INVALID_OWNER_SEED OFFSET(1) NUMBITS(1) [],
221        INVALID_DEV_ID OFFSET(2) NUMBITS(1) [],
222        INVALID_HEALTH_STATE OFFSET(3) NUMBITS(1) [],
223        INVALID_KEY_VERSION OFFSET(4) NUMBITS(1) [],
224        INVALID_KEY OFFSET(5) NUMBITS(1) [],
225        INVALID_DIGEST OFFSET(6) NUMBITS(1) [],
226    ],
227];
228
229// End generated register constants for keymgr
lowrisc/registers/keymgr_regs.rs

lowrisc/registers/
keymgr_regs.rs
